Contract Verilog Verification Engineer

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Contract Verilog Verification Engineer

  • Location: Cambridge
  • Salary: Up to £500 per day per day
  • Job Type:Temporary

Posted over 2 years ago

  • Sector: Technical & Engineering Recruitment
  • Contact: Jen Richardson
  • Contact Email: jrichardson@theonegroup.co.uk
  • Duration: 6-12 months
  • Expiry Date: 18 October 2021
  • Job Ref: BBBH41001_1633887499

The GPU Engineering Division of this well-known Cambridge based global company are looking for an experienced and highly motivated Contract Verilog Verification Engineer for around 6 - 12 months. Based with their talented and diverse team in Cambridge (can consider remote options), they are looking for an additional person to help verify their next-gen state of the art GPUs. The team predominantly employs constrained-random coverage-driven simulation techniques using SystemVerilog and UVM. This is a key role where you'll have the opportunity to work with hands-on, bench development project work and also create and deploy new methodologies within the team.

The team has two other sites based across Europe, so there may be the opportunity to travel to other sites during your work. The team includes design, verification and modelling engineers working on the next gen graphics processors.

Day Rate: Approx £500pd (inside IR35)

The Role:

  • Review and assess proposed design changes
  • Architect verification IP and full verification environments
  • Investigate and script new verification flows and optimise existing flows
  • Develop methodology and deploy within the group, having full ownership of verification closure

The Essentials:

  • Proven track record with constrained-random verification including ownership of a suitably complex verification environment
  • Confident using SystemVerilog to develop verification components and be familiar with the tools and processes for developing test benches and finishing all aspects of the verification process
  • Capable of developing verification flows to make best use of EDA tools.
  • Experience of architecting and implementing functional verification environments for complex IP. Experience developing re-usable and scalable code whilst having good knowledge of UVM.
  • Strong scripting skills (UNIX shell scripting, Python or Perl) - being able to develop scripting to support new flows
  • Ability to quickly understand and apply complex specification details and capable of owning all stages of a project to completion
  • Happy to tackle varied and complex technical challenges
  • Strong communication skills and ability to work well as part of a team as well as experience working and communicating with remote design centres

Useful:

  • Knowledge of graphics principles
  • Knowledge of C/C++, Scala/Java and good software principles
  • Experience with formal verification
  • Experience with emulation flows